United States Patent 10,096,761
Bellezza October 9, 2018
Thermoelectric device assembly with fusion layer structure suitable for thermoelectric Seebeck and Peltier devices
Abstract
A solderless thermoelectric device is capable of use at higher operating temperatures as compared to conventional low temperature solders thus allowing the thermoelectric device to be used in a Seebeck device, for example. The thermoelectric device forms a fusion layer between a copper metal layer and a semiconductor wafer layer by impregnating and surface coating graphene on the semiconductor wafer and heating, under pressure, the graphene coated semiconductor wafer to create a true metallurgical bond of the layers with superconducting interfaces and good thermoelectric properties.
Inventors: Bellezza; Anthony Paul (Parkesburg, PA)
Applicant Name: Bellezza; Anthony Paul
Family ID: 63685386
Appl. No.: 15/608,674
Filed: May 30, 2017
Current U.S. Class: 1/1
Current CPC Class: H01L 35/08 (20130101); H01L 35/34 (20130101); H01L 35/32 (20130101); H01L 35/16 (20130101); H01L 35/325 (20130101)
Current International Class: H01L 35/34 (20060101); H01L 35/32 (20060101); H01L 35/16 (20060101)
Field of Search: ;136/248
References Cited [Referenced By]
U.S. Patent Documents 2016/0064638 March 2016 Salvador
Primary Examiner: Nikmanesh; Seahvosh
Attorney, Agent or Firm: Smith; Lyman Patent Service Associates
Claims
What is claimed is:
1. A method for forming a thermoelectric device assembly, comprising: layering a first metal substrate against a first graphene coated semiconductor wafer on a first side of the metal substrate; layering a first side of a second graphene coated semiconductor wafer on a second, opposite side of the metal substrate; layering a second metal substrate against the first side of the second graphene coated semiconductor wafer to form a resulting assembly; applying a pressure to the resulting assembly to hold each layer together; and heating the resulting assembly to a temperature below the melting temperature of the first and second graphene coated semiconductor wafers to form a fusion bond between each layer, wherein the fusion bond is formed from carbonization of a martensitic to austenitic phase change as the first and second metal substrates absorbs graphene from the first and second graphene coated semiconductor wafers.
2. The method of claim 1, wherein the first metal substrate and the second metal substrate are copper substrates.
3. The method of claim 2, wherein the copper substrates are electroplated with a metal to form an electroplated substrate.
4. The method of claim 3, wherein the electroplated metal forms the fusion bond while undergoing the martensitic to austenitic phase change.
5. The method of claim 3, wherein the metal is a 40/60 nickel/iron mixture.
6. The method of claim 3, further comprising immediately after electroplating the metal on the copper substrates, cooling the electroplated substrate to change the metal from austenitic phase to martensitic phase.
7. The method of claim 1, wherein the first and second graphene semiconductor wafers are formed by submerging semiconductor wafers in a graphene oxide solution, removing the semiconductor wafers, drying the semiconductor wafers, and reducing the graphene oxide to graphene.
8. The method of claim 1, further comprising removing graphene from sides of the first and second graphene semiconductor wafers that do not contact the first or second metal substrate.
9. The method of claim 1, wherein the first graphene coated semiconductor is a p-type semiconductor and the second graphene coated semiconductor is an n-type semiconductor.
10. The method of claim 1, wherein the temperature is from about 440 C to about 500 C.
11. A method for forming a thermoelectric device assembly, comprising: electroplating a first copper substrate and a second copper substrate with a metal layer to form an electroplated metal on the first and second copper substrates; annealing the first and second copper substrates to bond the electroplated metal thereto; layering the first copper substrate against a graphene coated p-type semiconductor wafer on a first side of the first copper substrate; layering a first side of a graphene coated n-type semiconductor wafer on a second, opposite side of the first copper substrate; layering the second copper substrate against the first side of the graphene coated n-type semiconductor wafer to form a resulting assembly; applying a pressure to the resulting assembly to hold each layer together; and heating the resulting assembly to a temperature below the melting temperature of the graphene coated p- and n-type semiconductor wafers to form a fusion bond between each layer, wherein the fusion bond is formed from carbonization of a martensitic to austenitic phase change as the electroplated metal on the first and second copper substrates absorbs graphene from the graphene coated p- and n-type semiconductor wafers.
12. The method of claim 11, wherein the electroplated metal forms the fusion bond while undergoing the martensitic to austenitic phase change.
13. The method of claim 11, wherein the electroplated metal is a 40/60 nickel/iron mixture.
14. The method of claim 11, further comprising immediately after electroplating the metal layer on the first and second copper substrates, cooling the electroplated substrate to change the metal from austenitic phase to martensitic phase.
15. The method of claim 11, wherein the first and second graphene semiconductor wafers are formed by submerging semiconductor wafers in a graphene oxide solution, removing the semiconductor wafers, drying the semiconductor wafers, and reducing the graphene oxide to graphene.
16. The method of claim 15, further comprising removing graphene from sides of the first and second graphene semiconductor wafers that do not contact the first or second metal substrate.